In the fabrication of integrated circuit chips from a silicon wafer, dimensions must be controlled with extreme accuracy during the masking (or photo imaging) step in order to ensure that circuits are laid down within allowable specifications. An important tool for such dimensional control is the alignment technique or by using alignment marks. The alignment technique refers to the ability of printing images of a mask over other images that were printed in previously masking steps with high precision. The overlay errors which are defined as errors in the placement of one pattern in relation to another must be tightly controlled such that it is within an allowable range. The accuracy of pattern placement on a reticle (in a masking machine) is therefore crucial to the superposition of successive masks during chip fabrication. In order to ensure such accuracy, each mask contains specifically designed and positioned alignment marks, or registration marks which allow the alignment of a subsequent mask. During the fabrication of IC chips, it is critical to align each subsequent layers to a previous layer with extreme accuracy in order to ensure circuit continuity.
The alignment of a mask to a wafer is generally performed in a wafer stepper tool. For instance, a frequently used equipment is an ASM lithography stepper. The function of the stepper is to transfer a desired pattern from a reticle onto a photoresist layer formed on the wafer. Typically, the reticle contains a 5x magnified version of the pattern to be reproduced. The photoresist layer is generally a transparent photosensitive material that is coated on top of the wafer. After the wafer is loaded into the stepper machine, the alignment marks on the wafer are used as reference points for adjusting the position of the reticle over the wafer such that a precise alignment of the reticle to the previous layer formed on the wafer can be achieved.
Alignment is typically performed in an automated manner by sensing a light, i.e., a laser beam, detracted from alignment marks on the wafer. A typical wafer 10 having a locating notch 12 and alignment marks 14 is shown in FIG. 1. Since precision of alignment depends on the contrast of an optical signal obtained from an alignment mark, the mark should ideally be provided with a sufficiently large step, and consequently producing a large variance in its refractive index for producing a sufficiently large contrast. FIG. 2 is an illustration of how the measurement of an alignment mark is conducted on the surface of a silicon wafer. It is seen that an optical beam 20, or laser beam, is moved across the surface 22 of the wafer 10 in a perpendicular direction with the surface. A typical alignment mark 24, as shown in FIG. 2, is formed by first etching a trench in the silicon surface 22 and then filling it with silicon oxide 16. A photomask (not shown) such as one for the active area mask can then be directly aligned to the mark 24. An alignment signal 28 can be measured having a sufficient magnitude 30 such that a proper alignment can be accurately made. The registration of a new mask to a previously defined pattern on the wafer is therefore accomplished on the chip by scanning the optical beam 20 across the alignment mark 24 etched in the substrate 10 and by detecting the secondary electrons 26 and the backscattered electrons 32.
The alignment mark 24 is normally formed by etching a predetermined depth 18 into the surface 22 of silicon wafer 10. The step 18 etched forms a distinct step height in the wafer surface which is then used as an alignment mark. The depth of the alignment mark thus formed can be chosen such that it is a multiple of the wavelength of the optical light (or laser light) used in the stepper machine for performing alignment. For instance, in a typical alignment mark forming process, an alignment mark photoresist layer 34 is first deposited onto the surface of a silicon wafer. The thickness of the alignment mark photoresist layer can be suitably chosen from a range between about 8,000 .ANG. and about 15,000 .ANG.. After an image is formed in the photoresist layer 34, a descum procedure is necessary to remove any residual photoresist left on the surface of the wafer. The descum procedure can be carried out in an oxygen plasma process at 100.degree. C. and 12 Torr pressure, RF power of 300 W, an O.sub.2 flow rate of 8000 Sccm for an etch time of 15 seconds. The wafer is then sent through an oxide wet dip process followed by a hard bake for removal of all moisture. The wafer is then dry etched to form the alignment marks followed by a standard photoresist strip. A typical flow chart for the process is shown in FIG. 3.
In the conventional alignment mark forming process, a thin layer, i.e., of approximately 350 .ANG. of thermal oxide is first grown on the silicon substrate by a furnace process prior to the deposition of photoresist. The oxide layer serves two functions. First, it prevents silicon particles produced during a dry etching process from contaminating the wafer surface. Secondly, the growth of the oxide layer decreases the oxygen content (i.e., in SiO.sub.2) on the wafer surface which frequently contain impurities that have higher concentration of oxygen. As a result, the growth of the oxide layer on the wafer surface reduces surface defects on the wafer. The conventional process for forming alignment marks therefore requires an additional step of oxide removal by a wet dip process with acid. As a result, a hard bake process must be subsequently conducted to remove moisture. The conventional process for forming alignment marks therefore requires the additional processing steps of descuming, the oxide wet dip, and the hard bake process which increases the fabrication cost of a wafer.
It is therefore an object of the present invention to provide a method for forming alignment marks in a silicon wafer that does not have the drawbacks and shortcomings of the conventional methods.
It is another object of the present invention to provide a method for forming alignment marks in a silicon wafer that has simplified processing steps than the conventional methods.
It is a further object of the present invention to provide a method for forming alignment marks in a silicon wafer by first forming an oxide layer to prevent the contamination of silicon particles and then removing the oxide layer and partially the silicon layer in a single dry etching process.
It is yet another object of the present invention to provide a method for forming alignment marks in a silicon wafer that is capable of producing marks of improved detection signal when measured in a stepper machine.
It is still another object of the present invention to provide a method for forming alignment marks in a silicon wafer including the step of etching through an oxide layer and into the silicon surface by a single plasma dry etching process utilizing an etchant chemistry of fluorine and oxygen.
It is another further object of the present invention to provide a method for forming alignment marks in a silicon wafer including the step of etching through an oxide layer and into a silicon layer by using a mixture of CF.sub.4 and O.sub.2 as the etchant gas in a dry etching process.